Marvell told about MoChi and a new memory architecture

Marvell told about MoChi and a new memory architecture

During his speech at the conference ISSCC 2015 in San Francisco, head of technology division by Marvell Segat Sutardiya (Sehat Sutardja) noted the importance of developing new interconnect and memory architectures. This will reduce the cost and complexity of the circuits and systems of the next generation. The representative of the Marvell promised by the end of 2015 to release a prototype chip based interconnect architecture MoChi and Final-Level Cache (FLC).

MoChi Technology uses ARM AXI connection with a capacity of 8 Gbit / s or more, allowing the chips to communicate with virtually no perceptible delay. Furthermore, this technology will connect multiple chips in a daisy chain. Marvell is ready licensing MoChi one of FPGA-chip manufacturers, as well as some partners in Japan. However, to make it the industry standard company does not intend, as MoChi rapidly developing and changing.

Marvell told about MoChi and a new memory architecture

With regard to technology Final-Level Cache, it will significantly reduce the need for system operational capacity DRAM-memory (approximately 10 times, according to developers). It involves the use of a small layer at high volume DRAM-cache and SSDs. Currently on these technologies has a team of over a hundred engineers Marvell.

Marvell told about MoChi and a new memory architecture

Many students report praised the efforts of Marvell, but were skeptical experts. In particular, a senior analyst at Linley Group Demler Mike (Mike Demler) doubted that MoChi is something beyond what already developed in the industry. He also noted that the compounds MoChi not much different from PCI Express, and also drew attention to the problems with the reliability of systems with active sites using SSD, since the flash memory has a very limited number of write cycles.

Marvell told about MoChi and a new memory architecture

FLC approach would require support from the operating system to reveal their full potential. But it can be used with existing code. According to internal tests Marvell, FLC showed low levels of cache misses.

Marvell told about MoChi and a new memory architecture updated: February 25, 2015 author: John Malkovich