Intel will release server processors to reconfigure units

Intel will release server processors to reconfigure units

Ten years ago, developers of processors believed that optimize the performance of the specific tasks may be due to the involvement of specialized co-processors in the concept of Torrenza, but recently even embed AMD calls “custom” blocks directly to the CPU.

Intel has similar ideas are not alien to that prove this week published a press release in which the processor giant announces the start of cooperation with the Californian company eASIC, creating adaptable for specific tasks chips. It is expected that Intel will build “programmable” blocks into their processor Xeon. This will attract customers to expedite specific tasks. In contrast to the programmable matrix FPGA, such an arrangement would lead to higher energy efficiency, albeit at the expense of versatility. In addition, solutions eASIC productive FPGA, which is also important for potential clients. When will we see the first fruits of cooperation by Intel and eASIC, is not specified.

In this context, it becomes clear discussion on the level of rumors of interest in buying Intel Developer programmable matrix Altera. Obviously, the processor giant headed for the possibility of adapting its server processors to the needs of specific customers. Now release products eASIC to 28-nm technology is engaged in TSMC. Obviously, access to advanced lithography technology will allow Intel the first companies to expand their own capabilities.

Intel will release server processors to reconfigure units updated: May 13, 2015 author: John Malkovich